Invention Grant
- Patent Title: Three-term predictive adder and/or subtracter
- Patent Title (中): 三项预测加法器和/或减法器
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Application No.: US14192102Application Date: 2014-02-27
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Publication No.: US09448767B2Publication Date: 2016-09-20
- Inventor: Timothy D. Anderson , Mujibur Rahman , Kai Chirca
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Robert D. Marshall, Jr.; Frank D. Cimino
- Main IPC: G06F7/50
- IPC: G06F7/50 ; G06F7/57 ; G06F7/505 ; G06F7/506

Abstract:
A predictive adder produces the result of incrementing and/or decrementing a sum of A and B by a one-bit constant of the form of the form 2k, where k is a bit position at which the sum is to be incremented or decremented. The predictive adder predicts the ripple portion of bits in the potential sum of the first operand A and the second operand B that would be toggled by incrementing or decrementing the sum A+B by the one-bit constant to generate and indication of the ripple portion of bits in the potential sum. The predictive adder uses the indication of the ripple portion of bits in the potential sum and the carry output generated by evaluating A+B to produce the results of at least one of A+B+2k and A+B−2k.
Public/Granted literature
- US20140181165A1 Three-Term Predictive Adder and/or Subtracter Public/Granted day:2014-06-26
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