Invention Grant
US09459831B2 Fast computation of products by dyadic fractions with sign-symmetric rounding errors
有权
通过具有符号对称舍入误差的二进制分数快速计算产品
- Patent Title: Fast computation of products by dyadic fractions with sign-symmetric rounding errors
- Patent Title (中): 通过具有符号对称舍入误差的二进制分数快速计算产品
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Application No.: US14332028Application Date: 2014-07-15
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Publication No.: US09459831B2Publication Date: 2016-10-04
- Inventor: Yuriy Reznik
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Elaine H. Lo
- Main IPC: G06F7/483
- IPC: G06F7/483 ; G06F7/533 ; G06F17/14 ; H04N19/60 ; H04N19/42 ; G06F7/499

Abstract:
A product of an integer value and an irrational value may be determined by a sign-symmetric algorithm. A process may determine possible algorithms that minimize metrics such as mean asymmetry, mean error, variance of error, and magnitude of error. Given an integer variable x and rational dyadic constants that approximate the irrational fraction, a series of intermediate values may be produced that are sign-symmetric. The intermediate values may include a sequence of addition, subtraction and right shift operations the when summed together approximate the product of the integer and irrational value. Other operations, such as additions or subtractions of 0s or shifts by 0 bits may be removed.
Public/Granted literature
- US20140330878A1 FAST COMPUTATION OF PRODUCTS BY DYADIC FRACTIONS WITH SIGN-SYMMETRIC ROUNDING ERRORS Public/Granted day:2014-11-06
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