Invention Grant
- Patent Title: Sublithographic width finFET employing solid phase epitaxy
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Application No.: US14746017Application Date: 2015-06-22
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Publication No.: US09461042B2Publication Date: 2016-10-04
- Inventor: Kangguo Cheng , Joseph Ervin , Juntao Li , Chengwen Pei , Ravi M. Todi , Geng Wang
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8238 ; H01L21/84 ; H01L29/66 ; H01L27/092 ; H01L27/12 ; H01L29/06

Abstract:
A dielectric mandrel structure is formed on a single crystalline semiconductor layer. An amorphous semiconductor material layer is deposited on the physically exposed surfaces of the single crystalline semiconductor layer and surfaces of the mandrel structure. Optionally, the amorphous semiconductor material layer can be implanted with at least one different semiconductor material. Solid phase epitaxy is performed on the amorphous semiconductor material layer employing the single crystalline semiconductor layer as a seed layer, thereby forming an epitaxial semiconductor material layer with uniform thickness. Remaining portions of the epitaxial semiconductor material layer are single crystalline semiconductor fins and thickness of these fins are sublithographic. After removal of the dielectric mandrel structure, the single crystalline semiconductor fins can be employed to form a semiconductor device.
Public/Granted literature
- US20150287721A1 SUBLITHOGRAPHIC WIDTH FINFET EMPLOYING SOLID PHASE EPITAXY Public/Granted day:2015-10-08
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