Invention Grant
- Patent Title: Forming sacrificial composite materials for package-on-package architectures and structures formed thereby
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Application No.: US14658089Application Date: 2015-03-13
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Publication No.: US09472519B2Publication Date: 2016-10-18
- Inventor: Rajasekaran Swaminathan , Leonel R. Arana , Yoshihiro Tomita , Yosuke Kanaoka
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Konrad Raynes Davda & Victor LLP
- Agent Alan S. Raynes
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/10 ; H01L21/48 ; H01L23/498 ; H05K3/34
Abstract:
Methods of forming a microelectronic packaging structure are described. Those methods may include forming a solder paste comprising a sacrificial polymer on a substrate, curing the solder paste below a reflow temperature of the solder to form a solid composite hybrid bump on the conductive pads, forming a molding compound around the solid composite hybrid bump, and reflowing the hybrid bump, wherein the sacrificial polymer is substantially decomposed.
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