Invention Grant
- Patent Title: Multi-gate device with planar channel
- Patent Title (中): 具有平面通道的多栅极器件
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Application No.: US14817141Application Date: 2015-08-03
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Publication No.: US09478542B1Publication Date: 2016-10-25
- Inventor: Akira Ito
- Applicant: BROADCOM CORPORATION
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/02 ; H01L21/70 ; H01L29/66 ; H01L29/06 ; H01L29/10 ; H01L21/265 ; H01L21/8234

Abstract:
A semiconductor device includes a substrate having a well region implanted with a first dopant by a first well implantation and a non-doped section blocked from the first well implantation. The semiconductor device includes a semiconductor fin formed on the substrate, in which the semiconductor fin has a channel stop region and a channel region above the channel stop region. The channel stop region has a portion of the non-doped section and a portion of the well region. The semiconductor fin has a planar channel formed at an interface between the non-doped section and the channel region for additional current flow between source and drain regions of the semiconductor fin. The semiconductor device includes an isolation layer disposed adjacent to and in contact with the well region and the channel stop region. The semiconductor device also includes a gate structure disposed on the isolation layer and around the channel region.
Information query
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