Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts

Invention Grant

US09484255B1 Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts 有权

Title translation: 使用金属衬垫和金属绝缘体半导体触点的混合源极和漏极接触形成

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Patent Title: Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts
Patent Title (中): 使用金属衬垫和金属绝缘体半导体触点的混合源极和漏极接触形成
Application No.: US14930933

Application Date: 2015-11-03
Publication No.: US09484255B1

Publication Date: 2016-11-01
Inventor: Hiroaki Niimi , Shariq Siddiqui , Tenko Yamashita
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION , GLOBALFOUNDRIES INC.
Applicant Address: US NY Armonk KY Grand Cayman
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES INC.
Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES INC.
Current Assignee Address: US NY Armonk KY Grand Cayman
Agency: Tutunjian & Bitetto, P.C.
Agent Vazken Alexanian
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L21/768 ; H01L27/092 ; H01L23/535 ; H01L21/285 ; H01L29/78

Hybrid source and drain contact formation using metal liner and metal insulator semiconductor contacts

Abstract:

An electrical device including a first semiconductor device having a silicon and germanium containing source and drain region, and a second semiconductor device having a silicon containing source and drain region. A first device contact to at least one of said silicon and germanium containing source and drain region of the first semiconductor device including a metal liner of an aluminum titanium and silicon alloy and a first tungsten fill. A second device contact is in contact with at least one of the silicon containing source and drain region of the second semiconductor device including a material stack of a titanium oxide layer and a titanium layer. The second device contact may further include a second tungsten fill.

Abstract(Chinese):

一种电气装置，包括具有硅和锗的源极和漏极区域的第一半导体器件，以及具有含硅源极和漏极区域的第二半导体器件。与所述第一半导体器件的所述含硅和含锗的源极和漏极区域中的至少一个接触的第一器件包括铝钛和硅合金的金属衬垫和第一钨填充物。第二器件触点与第二半导体器件的含硅源极和漏极区域中的至少一个接触，包括氧化钛层和钛层的材料堆叠。第二器件接触件还可以包括第二钨填充物。

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS