A array substrate is disclosed. The array substrate includes: a substrate (10); and a first gate metal layer (111), a first gate insulating layer (121), a semiconductor layer (13) and a source-drain electrode layer (14) disposed in this order on the substrate from bottom to top. The array substrate (10) further includes a second gate insulating layer (122) disposed on the source-drain electrode layer (14); and a second gate metal layer (112) disposed on the second gate insulating layer (122). A method of manufacturing an array substrate is also disclosed.