Invention Grant
- Patent Title: Multiphase clock data recovery circuit calibration
- Patent Title (中): 多相时钟数据恢复电路校准
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Application No.: US14842610Application Date: 2015-09-01
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Publication No.: US09485080B1Publication Date: 2016-11-01
- Inventor: Ying Duan , Chulkyu Lee , Harry Dang , Ohjoon Kwon
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza LLP
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L5/00 ; H04L7/08

Abstract:
Methods, apparatus, and systems for clock calibration are disclosed. A method for clock data recovery circuit calibration includes configuring a first clock recovery circuit to provide a clock signal that has a first frequency and that includes a single pulse for each symbol transmitted on a 3-wire, 3-phase interface, and calibrating the first clock recovery circuit by incrementally increasing a delay period provided by a delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that is less than the first frequency and, when the first clock recovery circuit has a frequency that is less than the first frequency, incrementally decreasing the delay period provided by the delay element of the first clock recovery circuit until the clock signal provided by the first clock recovery circuit has a frequency that matches the first frequency.
Information query