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83 条记录 (耗时 0.033 秒)

    Unit interval jitter improvement in a C-PHY interface
    1.
    发明授权
    Unit interval jitter improvement in a C-PHY interface 有权

    公开(公告)号：US11463233B2

    公开(公告)日：2022-10-04

    申请号：US17307770

    申请日：2021-05-04

    申请人： QUALCOMM Incorporated

    发明人： Chulkyu Lee ,  George Alan Wiley

    IPC分类号： H04B14/04 ,  H04L7/00 ,  G06F13/42 ,  H04L12/40

    摘要： Methods, apparatus, and systems for communication over a C-PHY interface are disclosed. A transmitting device has a driver circuit configured to drive a three-wire bus in accordance with a symbol received at an input of the driver circuit, a pattern detector receives a sequence of symbols to be transmitted over the three-wire bus in a plurality of transmission symbol intervals, and a selection circuit responsive to a select signal provided by the pattern detector and configured to select between delayed and undelayed versions of a current symbol to drive the input of the driver circuit during a corresponding transmission symbol interval. The select signal may select the delayed version of the current symbol when a combination of the current symbol with an immediately preceding symbol cause the pattern detector to indicate a pattern match.

    Driver architecture for multiphase and amplitude encoding transmitters
    2.
    发明授权
    Driver architecture for multiphase and amplitude encoding transmitters 有权

    公开(公告)号：US11108604B2

    公开(公告)日：2021-08-31

    申请号：US16984896

    申请日：2020-08-04

    申请人： QUALCOMM Incorporated

    发明人： Chulkyu Lee ,  Dhaval Sejpal ,  George Alan Wiley

    IPC分类号： H04B1/00 ,  H04L27/20 ,  H04L27/233 ,  H04L27/227

    摘要： Certain disclosed methods, apparatus, and systems enable improved communication on a multiphase communication link through improved encoding techniques and protocol. A data communication apparatus has a plurality of line drivers configured to couple the apparatus to a 3-wire link, and a data encoder configured to encode at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted by the plurality of line drivers over the 3-wire link such that each pair of consecutively-transmitted symbols comprises two different symbols. Each symbol defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval. Data may be encoded using a combination of 3-phase and pulse amplitude modulation.

    Low power physical layer driver topologies
    3.
    发明授权
    Low power physical layer driver topologies 有权

    公开(公告)号：US10833899B2

    公开(公告)日：2020-11-10

    申请号：US16526332

    申请日：2019-07-30

    申请人： QUALCOMM Incorporated

    发明人： Shih-Wei Chou ,  Chulkyu Lee ,  Dhaval Sejpal

    IPC分类号： H04L25/02 ,  H04L25/493 ,  G06F13/40 ,  H04B1/04 ,  H04B3/52

    摘要： System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

    Calibration pattern and duty-cycle distortion correction for clock data recovery in a multi-wire, multi-phase interface
    4.
    发明授权
    Calibration pattern and duty-cycle distortion correction for clock data recovery in a multi-wire, multi-phase interface 有权

    公开(公告)号：US10333690B1

    公开(公告)日：2019-06-25

    申请号：US15971016

    申请日：2018-05-04

    申请人： QUALCOMM Incorporated

    发明人： Ying Duan ,  Abhay Dixit ,  Shih-Wei Chou ,  Chulkyu Lee

    IPC分类号： H04L7/033 ,  H04L7/00 ,  G09G5/00 ,  H04L25/49

    摘要： Methods, apparatus, and systems for calibration and correction of data communications over a multi-wire, multi-phase interface are disclosed. In particular, calibration is provided for data communication devices coupled to a 3-line interface. The calibration includes generating and transmitting a calibration pattern on the 3-line interface, where the generation of the pattern includes toggling two of three interface lines from one voltage level to another voltage level over a predetermined time interval. Furthermore, the generation of the pattern includes maintaining a remaining third interface line at a common mode voltage level over the predetermined time interval, wherein only a single transition occurs for the predetermined time interval. Calibration data may then be derived in a receiver device using the transmitted calibration pattern.

    Transcoding method for multi-wire signaling that embeds clock information in transition of signal state
    6.
    发明授权
    Transcoding method for multi-wire signaling that embeds clock information in transition of signal state 有权
    用于在信号状态转换中嵌入时钟信息的多线信号的转码方法

    公开(公告)号：US09337997B2

    公开(公告)日：2016-05-10

    申请号：US14199898

    申请日：2014-03-06

    申请人： QUALCOMM Incorporated

    发明人： Shoichiro Sengoku ,  George Alan Wiley ,  Chulkyu Lee ,  Joseph Cheung

    IPC分类号： H04L27/00 ,  H04L7/033 ,  H04L7/027 ,  H04L7/00 ,  H04L25/49 ,  H04L25/493 ,  H03K5/1252 ,  H03K5/1534 ,  H04L25/14 ,  H04L25/02

    CPC分类号： H04L7/033 ,  H03K5/1252 ,  H03K5/1534 ,  H04L7/0066 ,  H04L7/027 ,  H04L25/0272 ,  H04L25/14 ,  H04L25/49 ,  H04L25/4906 ,  H04L25/493

    摘要： A method for performing multi-wire signaling encoding is provided in which a clock signal is encoded within symbol transitions. A sequence of data bits is converted into a plurality of m transition numbers. Each transition number is converted into a sequential symbol number from a set of sequential symbol numbers. The sequential symbol number is converted into a raw symbol that can be transmitted over a plurality of differential drivers. The raw symbol is transmitted spread over a plurality of n wires, wherein the clock signal is effectively embedded in the transmission of raw symbols since the conversion from transition number into a sequential symbol number guarantees that no two consecutive raw symbols are the same. The raw symbol is guaranteed to have a non-zero differential voltage across all pairs of the plurality of n wires.

    摘要翻译： 提供了一种用于执行多线信令编码的方法，其中在符号转换内对时钟信号进行编码。 数据位序列被转换成多个m个转换数。 每个转换编号从一组顺序符号编号转换成顺序符号。 顺序符号号被转换成可以通过多个差分驱动器发送的原始符号。 原始符号被传播扩展到多条n线，其中时钟信号被有效地嵌入在原始符号的传输中，因为从转换数转换为顺序符号，保证没有两个连续的原始符号相同。 原始符号保证在多条n线的所有对上具有非零的差分电压。

    Specifying a 3-phase or N-phase eye pattern
    7.
    发明授权
    Specifying a 3-phase or N-phase eye pattern 有权
    指定3相或N相眼图

    公开(公告)号：US09215063B2

    公开(公告)日：2015-12-15

    申请号：US14507702

    申请日：2014-10-06

    申请人： QUALCOMM Incorporated

    发明人： George Alan Wiley ,  Chulkyu Lee

    IPC分类号： H04L7/04 ,  H04L1/20 ,  H04L1/24 ,  H04L25/49 ,  H04L25/02 ,  H04L5/20

    CPC分类号： H04L7/042 ,  H04L1/205 ,  H04L1/206 ,  H04L1/247 ,  H04L5/20 ,  H04L25/0272 ,  H04L25/0282 ,  H04L25/0294 ,  H04L25/0298 ,  H04L25/4917

    摘要： System, methods and apparatus are described that facilitate tests and measurements related to multi-wire, multi-phase communications links. Information is transmitted in N-phase polarity encoded symbols and an eye pattern corresponding to the symbols may be generated such that the symbols are aligned with a trigger for each symbol that corresponds to a clock edge used to sample the symbols. The eye pattern may be used to determine sufficiency of setup times in the communication links and other such characteristics defining a communications channel capabilities.

    摘要翻译： 描述了便于与多线，多相通信链路相关的测试和测量的系统，方法和装置。 信息以N相极性编码符号发送，并且可以生成与符号相对应的眼图，使得符号与对应于用于采样符号的时钟边缘的每个符号的触发对齐。 眼图可以用于确定通信链路中的建立时间的充分性以及定义通信信道能力的其它这样的特性。

    N-phase polarity output pin mode multiplexer
    8.
    发明授权
    N-phase polarity output pin mode multiplexer 有权
    N相极性输出引脚模式多路复用器

    公开(公告)号：US09143362B2

    公开(公告)日：2015-09-22

    申请号：US13933090

    申请日：2013-07-01

    申请人： QUALCOMM Incorporated

    发明人： George A. Wiley ,  Glenn D. Raskin ,  Chulkyu Lee

    IPC分类号： H04L27/00 ,  H04L25/02 ,  G06F13/38 ,  H04L25/14 ,  H04L25/49 ,  H04L25/493 ,  H04L5/14 ,  H04L5/16

    CPC分类号： H04L25/02 ,  G06F13/385 ,  H04L5/1423 ,  H04L5/16 ,  H04L25/0272 ,  H04L25/14 ,  H04L25/4923 ,  H04L25/493

    摘要： System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Data is selectively transmitted as N-phase polarity encoded symbols or as packets on differentially driven connectors. A desired operational mode for communicating between the two devices is determined, an encoder is selected to drive a plurality of connectors communicatively coupling the two devices, and a plurality of drivers is configured to receive encoded data from the encoder and drive the plurality of connectors. Switches may couple outputs of the selected encoder to the plurality of drivers. One or more outputs of another encoder may be caused or forced to enter a high impedance mode.

    摘要翻译： 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 选择性地将数据作为N相极性编码的符号或作为差分驱动的连接器上的分组发送。 确定用于在两个设备之间通信的期望的操作模式，选择编码器来驱动通信地耦合两个设备的多个连接器，并且多个驱动器被配置为从编码器接收编码数据并驱动多个连接器。 开关可以将所选择的编码器的输出耦合到多个驱动器。 可能引起另一个编码器的一个或多个输出或强制进入高阻抗模式。

    N-PHASE SIGNAL TRANSITION ALIGNMENT
    10.
    发明申请
    N-PHASE SIGNAL TRANSITION ALIGNMENT 有权
    N相信号转换对准

    公开(公告)号：US20150043693A1

    公开(公告)日：2015-02-12

    申请号：US14453346

    申请日：2014-08-06

    申请人： QUALCOMM Incorporated

    发明人： Chulkyu Lee ,  George Alan Wiley

    IPC分类号： H04L7/00

    CPC分类号： G06F13/36 ,  G06F13/4063 ,  G06F13/4068 ,  G06F13/4278 ,  G06F13/4282 ,  H04L7/0033 ,  H04L25/14 ,  H04L25/4917 ,  H04L25/4919 ,  Y02D10/14 ,  Y02D10/151

    摘要： System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Drivers may be adapted or configured to align state transitions on two or more connectors in order to minimize a transition period between consecutive symbols. The drivers may include circuits that advance or delay certain transitions. The drivers may include pre-emphasis circuits that operate to drive the state of a connector for a portion of the transition period, even when the connector is transitioned to an undriven state.

    摘要翻译： 描述了促进数据传输的系统，方法和装置，特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 驱动器可以被适配或配置成在两个或更多个连接器上对准状态转换，以使连续符号之间的过渡周期最小化。 驱动器可以包括推进或延迟某些转换的电路。 驱动器可以包括预加重电路，即，即使当连接器转换到未驱动状态时，该预加重电路用于驱动连接器的一部分过渡期的状态。