Embodiments relate to Hall effect sensor circuits and devices that provide improved performance, such as reduced residual offset errors and/or improved S/N ratios. In an embodiment, a Hall effect sensor circuit comprises two circuit portions, a first with a higher bandwidth for higher frequencies and having an improved S/N ratio, and a second with a lower bandwidth for lower frequencies and having low residual offset. First and second Hall plates or devices are incorporated in the first and second circuit portions. The first Hall plate can be operated with a larger bias voltage and a larger, high-pass-filtered signal bandwidth, while the second Hall plate can be operated with a smaller bias voltage and a smaller, low-pass-filtered signal bandwidth. Individual output signals from each of the first and second Hall plates can be scaled and combined to provide an overall output signal with the benefits of each circuit portion, including reduced residual offset error and negligible increased noise.