Invention Grant
US09489197B2 Highly efficient different precision complex multiply accumulate to enhance chip rate functionality in DSSS cellular systems 有权
高效率的不同精度的复数乘法累加以增强DSSS蜂窝系统中的码片速率功能

Highly efficient different precision complex multiply accumulate to enhance chip rate functionality in DSSS cellular systems
Abstract:
This invention is a digital signal processor capable of performing correlation of data with pseudo noise for code division multiple access (CDMA) decoding using clusters. Each cluster includes plural multipliers. The multipliers multiply real and imaginary parts of packed data by corresponding pseudo noise data. Within a cluster the real parts and the imaginary parts of the products are summed separately. This forms plural complex number outputs equal in number to the number of clusters. The pseudo noise data is offset relative to the data input differing amounts for different clusters. The clusters are divided into first half clusters receiving data from even numbered slots and second half clusters receiving data from odd numbered slots. The correlation unit includes a mask input to selectively zero a multiplier product.
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