Invention Grant
US09496331B2 Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same
有权
具有具有超结结构的垂直MOSFET的半导体器件及其制造方法
- Patent Title: Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same
- Patent Title (中): 具有具有超结结构的垂直MOSFET的半导体器件及其制造方法
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Application No.: US14649595Application Date: 2013-12-03
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Publication No.: US09496331B2Publication Date: 2016-11-15
- Inventor: Kouji Eguchi , Youhei Oda
- Applicant: DENSO CORPORATION
- Applicant Address: JP Kariya
- Assignee: DENSO CORPORATION
- Current Assignee: DENSO CORPORATION
- Current Assignee Address: JP Kariya
- Agency: Posz Law Group, PLC
- Priority: JP2012-268412 20121207; JP2012-268413 20121207; JP2013-222256 20131025
- International Application: PCT/JP2013/007064 WO 20131203
- International Announcement: WO2014/087633 WO 20140612
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/06 ; H01L29/66 ; H01L21/308 ; H01L21/306 ; H01L21/265 ; H01L29/78 ; H01L29/10

Abstract:
A method for manufacturing a semiconductor device includes: preparing a semiconductor substrate, in which a first semiconductor layer is formed on a substrate; forming a first concave portion in the first semiconductor layer; forming trenches on the first semiconductor layer in the first concave portion; epitaxially growing a second semiconductor layer for embedding in each trench and the first concave portion; forming a SJ structure having PN columns including the second semiconductor layer in each trench and the first semiconductor layer between the trenches; and forming the vertical MOSFET by: forming a channel layer and a source region contacting the channel layer on the SJ structure; forming a gate electrode over the channel layer through a gate insulating film; forming a source electrode connected to the source region; and forming a drain electrode on a rear of the substrate.
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