公开(公告)号：US12080792B2

公开(公告)日：2024-09-03

申请号：US17505747

申请日：2021-10-20

Applicant: DENSO CORPORATION

Inventor： Youhei Oda ,  Kouichi Sawada

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66734

Abstract: A semiconductor device includes a semiconductor switching element having a drift layer, a body region, a first impurity region, trench gate structures, a high impurity concentration layer, an interlayer insulation film, an upper electrode and a lower electrode. The body region is arranged on the drift layer. The first impurity region is arranged in a surface portion of the body region in the body region and has an impurity concentration higher than the drift layer. Each of the trench gate structures includes a trench. A shield electrode, an intermediate insulation film and a gate electrode layer are stacked through an insulation film in the trench. The high impurity concentration layer is arranged on a side opposite to the body region to sandwich the drift layer between the high impurity concentration layer and the body region. The interlayer insulation film is arranged on the trench gate structures.

公开(公告)号：US20150118849A1

公开(公告)日：2015-04-30

申请号：US14391038

申请日：2013-04-19

Applicant: DENSO CORPORATION

Inventor： Youhei Oda ,  Yoshitaka Noda

IPC: H01L21/3065 ,  H01L21/308

CPC classification number: H01L21/30655 ,  H01L21/308

Abstract: A trench is etched in a semiconductor wafer by turning a first introduced gas introduced into a reaction chamber into plasma. A protection film is formed on a wall surface of the trench by turning a second introduced gas introduced into the reaction chamber into plasma. The protection film formed on a bottom surface of the trench is removed by turning a third introduced gas introduced into the reaction chamber into plasma. The reaction chamber is evacuated after the protection film formed on the bottom surface of the trench is removed.

Abstract translation: 通过将引入反应室的第一引入气体转化为等离子体，在半导体晶片中蚀刻沟槽。 通过将引入反应室的第二引入气体转换为等离子体，在沟槽的壁表面上形成保护膜。 通过将引入到反应室中的第三引入气体转化为等离子体来除去形成在沟槽的底表面上的保护膜。 在将沟槽底面上形成的保护膜除去后，将反应室抽真空。

公开(公告)号：US08673749B2

公开(公告)日：2014-03-18

申请号：US13711993

申请日：2012-12-12

Applicant: DENSO CORPORATION

Inventor： Kouji Eguchi ,  Youhei Oda ,  Shinichi Adachi

IPC: H01L21/20 ,  H01L21/36 ,  H01L21/4763

CPC classification number: H01L21/78 ,  H01L21/02639 ,  H01L21/30625 ,  H01L21/31138 ,  H01L29/0657

Abstract: In a semiconductor device manufacturing method, an insulating layer is formed on a front surface of a semiconductor substrate. Trenches are formed in the substrate by using the insulating layer as a mask so that a first portion of the insulating layer is located on the front surface between the trenches and that a second portion of the insulating layer is located on the front surface at a position other than between the trenches. The entire first portion is removed, and the second portion around an opening of each trench is removed. The trenches are filled with an epitaxial layer by epitaxially growing the epitaxial layer over the front surface side. The front surface side is polished by using the remaining second portion as a polishing stopper.

Abstract translation: 在半导体器件制造方法中，在半导体衬底的前表面上形成绝缘层。 通过使用绝缘层作为掩模在衬底中形成沟槽，使得绝缘层的第一部分位于沟槽之间的前表面上，并且绝缘层的第二部分位于前表面上的位置 除了沟槽之外。 去除整个第一部分，并且去除每个沟槽的开口周围的第二部分。 通过在前表面侧外延生长外延层，在沟槽中填充有外延层。 通过使用剩余的第二部分作为抛光停止器来抛光前表面侧。

公开(公告)号：US09496331B2

公开(公告)日：2016-11-15

申请号：US14649595

申请日：2013-12-03

Applicant: DENSO CORPORATION

Inventor： Kouji Eguchi ,  Youhei Oda

IPC: H01L21/336 ,  H01L29/06 ,  H01L29/66 ,  H01L21/308 ,  H01L21/306 ,  H01L21/265 ,  H01L29/78 ,  H01L29/10

CPC classification number: H01L29/06 ,  H01L21/26513 ,  H01L21/306 ,  H01L21/30625 ,  H01L21/308 ,  H01L23/544 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/66 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: A method for manufacturing a semiconductor device includes: preparing a semiconductor substrate, in which a first semiconductor layer is formed on a substrate; forming a first concave portion in the first semiconductor layer; forming trenches on the first semiconductor layer in the first concave portion; epitaxially growing a second semiconductor layer for embedding in each trench and the first concave portion; forming a SJ structure having PN columns including the second semiconductor layer in each trench and the first semiconductor layer between the trenches; and forming the vertical MOSFET by: forming a channel layer and a source region contacting the channel layer on the SJ structure; forming a gate electrode over the channel layer through a gate insulating film; forming a source electrode connected to the source region; and forming a drain electrode on a rear of the substrate.

Abstract translation: 一种制造半导体器件的方法包括：制备半导体衬底，其中在衬底上形成第一半导体层; 在所述第一半导体层中形成第一凹部; 在所述第一凹部中的所述第一半导体层上形成沟槽; 外延生长用于嵌入每个沟槽和第一凹部的第二半导体层; 形成具有PN列的SJ结构，所述PN列包括每个沟槽中的第二半导体层和沟槽之间的第一半导体层; 以及通过以下方式形成垂直MOSFET：在SJ结构上形成沟道层和与沟道层接触的源极区; 通过栅极绝缘膜在所述沟道层上形成栅电极; 形成连接到所述源极区的源电极; 以及在所述衬底的后部形成漏电极。

公开(公告)号：US10403709B2

公开(公告)日：2019-09-03

申请号：US15777681

申请日：2016-11-17

Applicant: DENSO CORPORATION

Inventor： Youhei Oda ,  Tsuyoshi Fujiwara

IPC: H01L21/20 ,  H01L49/02 ,  C23C14/06 ,  C23C16/06 ,  H01L21/822 ,  H01L27/04 ,  C23C16/34 ,  C23C16/40 ,  H01L21/285

Abstract: Roughness is eliminated and planarization is achieved by a metal oxide film on a surface of a lower electrode. Consequently, damage on a capacitive film caused by the roughness of the lower electrode is reduced. Furthermore, physical damage on the capacitive film is reduced by forming a first layer of an upper electrode by, for example, CVD. Consequently, the damage on the capacitive film is suppressed, and the reliability of the capacitive film is improved. Furthermore, not by forming the whole upper electrode by the CVD or the like, but by forming a second layer by PCD or the like on the first layer, an increase in resistance of the upper electrode is suppressed as well.

公开(公告)号：US09299576B2

公开(公告)日：2016-03-29

申请号：US14391038

申请日：2013-04-19

Applicant: DENSO CORPORATION

Inventor： Youhei Oda ,  Yoshitaka Noda

IPC: H01L21/3065 ,  H01L21/308

CPC classification number: H01L21/30655 ,  H01L21/308

Abstract: A trench is etched in a semiconductor wafer by turning a first introduced gas introduced into a reaction chamber into plasma. A protection film is formed on a wall surface of the trench by turning a second introduced gas introduced into the reaction chamber into plasma. The protection film formed on a bottom surface of the trench is removed by turning a third introduced gas introduced into the reaction chamber into plasma. The reaction chamber is evacuated after the protection film formed on the bottom surface of the trench is removed.

Abstract translation: 通过将引入反应室的第一引入气体转化为等离子体，在半导体晶片中蚀刻沟槽。 通过将引入反应室的第二引入气体转换为等离子体，在沟槽的壁表面上形成保护膜。 通过将引入到反应室中的第三引入气体转化为等离子体来除去形成在沟槽的底表面上的保护膜。 在将沟槽底面上形成的保护膜除去后，将反应室抽真空。

公开(公告)号：US20130164913A1

公开(公告)日：2013-06-27

申请号：US13711993

申请日：2012-12-12

Applicant: DENSO CORPORATION

Inventor： Kouji EGUCHI ,  Youhei Oda ,  Shinichi Adachi

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L21/02639 ,  H01L21/30625 ,  H01L21/31138 ,  H01L29/0657

Abstract: In a semiconductor device manufacturing method, an insulating layer is formed on a front surface of a semiconductor substrate. Trenches are formed in the substrate by using the insulating layer as a mask so that a first portion of the insulating layer is located on the front surface between the trenches and that a second portion of the insulating layer is located on the front surface at a position other than between the trenches. The entire first portion is removed, and the second portion around an opening of each trench is removed. The trenches are filled with an epitaxial layer by epitaxially growing the epitaxial layer over the front surface side. The front surface side is polished by using the remaining second portion as a polishing stopper.

Abstract translation: 在半导体器件制造方法中，在半导体衬底的前表面上形成绝缘层。 通过使用绝缘层作为掩模在衬底中形成沟槽，使得绝缘层的第一部分位于沟槽之间的前表面上，并且绝缘层的第二部分位于前表面上的位置 除了沟槽之外。 去除整个第一部分，并且去除每个沟槽的开口周围的第二部分。 通过在前表面侧外延生长外延层，在沟槽中填充有外延层。 通过使用剩余的第二部分作为抛光停止器来抛光前表面侧。