Invention Grant
US09508588B2 Methods for fabricating integrated circuits with isolation regions having uniform step heights
有权
用于制造具有均匀阶梯高度的隔离区域的集成电路的方法
- Patent Title: Methods for fabricating integrated circuits with isolation regions having uniform step heights
- Patent Title (中): 用于制造具有均匀阶梯高度的隔离区域的集成电路的方法
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Application No.: US14527424Application Date: 2014-10-29
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Publication No.: US09508588B2Publication Date: 2016-11-29
- Inventor: Carsten Grass , Martin Trentzsch , Sören Jansen
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Lorenz & Kopf, LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/266 ; H01L21/311
Abstract:
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate including an isolation region between a first device region and a second device region. The isolation region includes a first portion adjacent the first device region and a second portion adjacent the second device region. The method includes selectively etching the second portion of the isolation region to a second height. The method forms an insulation layer over the first device region and second device region. The method further includes selectively etching the insulation layer over the first device region and the first portion of the isolation region. The first portion of the isolation region is etched to a first height substantially equal to the second height.
Public/Granted literature
- US20160126132A1 METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH ISOLATION REGIONS HAVING UNIFORM STEP HEIGHTS Public/Granted day:2016-05-05
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