Invention Grant
US09524771B2 DRAM sub-array level autonomic refresh memory controller optimization
有权
DRAM子阵列级自动刷新内存控制器优化
- Patent Title: DRAM sub-array level autonomic refresh memory controller optimization
- Patent Title (中): DRAM子阵列级自动刷新内存控制器优化
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Application No.: US14148515Application Date: 2014-01-06
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Publication No.: US09524771B2Publication Date: 2016-12-20
- Inventor: Deepti Vijayalakshmi Sriramagiri , Jungwon Suh , Xiangyu Dong
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM INCORPORATED
- Current Assignee: QUALCOMM INCORPORATED
- Current Assignee Address: US CA San Diego
- Agency: Seyfarth Shaw LLP
- Main IPC: G11C11/406
- IPC: G11C11/406 ; G06F13/16
Abstract:
A method of refreshing a dynamic random access memory (DRAM) includes detecting an open page of the DRAM at a row of a DRAM bank within an open sub-array of the DRAM bank. The method also includes delaying issuance of a refresh command to a target refresh row of the DRAM bank when the target refresh row of the DRAM bank is within the open sub-array of the DRAM bank.
Public/Granted literature
- US20150016203A1 DRAM SUB-ARRAY LEVEL AUTONOMIC REFRESH MEMORY CONTROLLER OPTIMIZATION Public/Granted day:2015-01-15
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