Invention Grant
US09530741B2 Semiconductor packages having residual stress layers and methods of fabricating the same 有权
具有残余应力层的半导体封装及其制造方法

Semiconductor packages having residual stress layers and methods of fabricating the same
Abstract:
A semiconductor package is provided. The semiconductor includes a lower package and an upper package stacked on the lower package. The lower package includes a package substrate, a semiconductor chip, a mold layer and a residential stress layer. The package substrate has upper and lower surfaces. The semiconductor chip is disposed on the upper surface of the package substrate. The mold layer encapsulates the semiconductor chip. The residual stress layer is disposed on the semiconductor chip. The residual stress layer includes a plastically deformed surface. The residual stress layer has a residual stress to counterbalance warpage of the lower package.
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