Invention Grant
US09536877B2 Methods of forming different spacer structures on integrated circuit products having differing gate pitch dimensions and the resulting products
有权
在具有不同栅间距尺寸的集成电路产品上形成不同间隔结构的方法以及所得产品
- Patent Title: Methods of forming different spacer structures on integrated circuit products having differing gate pitch dimensions and the resulting products
- Patent Title (中): 在具有不同栅间距尺寸的集成电路产品上形成不同间隔结构的方法以及所得产品
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Application No.: US14195484Application Date: 2014-03-03
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Publication No.: US09536877B2Publication Date: 2017-01-03
- Inventor: Xiuyu Cai , Ruilong Xie , Kangguo Cheng , Ali Khakifirooz
- Applicant: GLOBALFOUNDRIES Inc. , International Business Machines Corporation
- Applicant Address: KY Grand Cayman US NY Armonk
- Assignee: GLOBALFOUNDRIES Inc.,International Business Machines Corporation
- Current Assignee: GLOBALFOUNDRIES Inc.,International Business Machines Corporation
- Current Assignee Address: KY Grand Cayman US NY Armonk
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L23/485 ; H01L21/768 ; H01L23/532
Abstract:
One example disclosed herein involves forming source/drain conductive contacts to first and second source/drain regions, the first source/drain region being positioned between a first pair of transistor devices having a first gate pitch dimension, the second source/drain region being positioned between a second pair of transistor devices having a second gate pitch dimension that is greater than the first gate pitch dimension, wherein the first and second pairs of transistor devices have a gate structure and sidewall spacers positioned adjacent the gate structure.
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