Invention Grant
US09547741B2 Methods, apparatus, and system for using filler cells in design of integrated circuit devices
有权
在集成电路器件设计中使用填充电池的方法,装置和系统
- Patent Title: Methods, apparatus, and system for using filler cells in design of integrated circuit devices
- Patent Title (中): 在集成电路器件设计中使用填充电池的方法,装置和系统
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Application No.: US14518939Application Date: 2014-10-20
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Publication No.: US09547741B2Publication Date: 2017-01-17
- Inventor: Uwe Paul Schroeder , Sushama Davar
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H01L29/06 ; H01L29/66

Abstract:
At least one method, apparatus and system disclosed involves circuit layout for an integrated circuit device. A design for an integrated circuit device is received; The design comprises a first functional cell and a second functional cell. The first functional cell is placed on a circuit layout. A determination is made as to whether the first cell comprises a vertical boundary that is electrically floating. A filler cell is placed adjacent to the vertical boundary on the circuit layout in response to determining that the first cell comprises the vertical boundary that is electrically floating. The second functional cell is placed adjacent to the filler cell to form a contiguous active area on the circuit layout.
Public/Granted literature
- US20160110489A1 METHODS, APPARATUS, AND SYSTEM FOR USING FILLER CELLS IN DESIGN OF INTEGRATED CIRCUIT DEVICES Public/Granted day:2016-04-21
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