A display substrate includes a first base substrate; a gate line, a data line and a common electrode line arranged on the first base substrate; a plurality of pixel units each including a first sub-pixel electrode, a second sub-pixel electrode, a first thin film transistor, a second thin film transistor and a third thin film transistor; and a charge adjustment-control line arranged on the first base substrate, where the charge adjustment-control line and the gate line are between the first sub-pixel electrode and the second sub-pixel electrode. The first thin film transistor is connected to the gate line, the data line and the first sub-pixel electrode; the second thin film transistor is connected to the gate line, the data line and the second sub-pixel electrode; the third thin film transistor is connected to the charge adjustment control line, the first sub-pixel electrode and the common electrode line.