Invention Grant
- Patent Title: Multithreading using an ordered list of hardware contexts
- Patent Title (中): 多线程使用硬件上下文的有序列表
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Application No.: US14539342Application Date: 2014-11-12
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Publication No.: US09558000B2Publication Date: 2017-01-31
- Inventor: C. John Glossner , Gary J. Nacer , Murugappan Senthilvelan , Vitaly Kalashnikov , Arthur J. Hoane , Paul D'Arcy , Sabin D. Iancu , Shenghong Wang
- Applicant: Optimum Semiconductor Technologies, Inc.
- Applicant Address: US NY Tarrytown
- Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee: Optimum Semiconductor Technologies, Inc.
- Current Assignee Address: US NY Tarrytown
- Agency: Lowenstein Sandler LLP
- Agent Jialin Zhong, Esq.
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38 ; G06F9/46
Abstract:
A processing device identifies a set of software threads having instructions waiting to issue. For each software thread in the set of the software threads, the processing device binds the software thread to an available hardware context in a set of hardware contexts and stores an identifier of the available hardware context bound to the software thread to a next available entry in an ordered list. The processing device reads an identifier stored in an entry of the ordered list. Responsive to an instruction associated with the identifier having no dependencies with any other instructions among the instructions waiting to issue, the processing device issues the instruction waiting to issue to the hardware context associated with the identifier.
Public/Granted literature
- US20150220347A1 DETERMINISTIC AND OPPORTUNISTIC MULTITHREADING Public/Granted day:2015-08-06
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