Invention Grant
- Patent Title: Method of fabricating low CTE interposer without TSV structure
- Patent Title (中): 制造没有TSV结构的低CTE插入器的方法
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Application No.: US14524280Application Date: 2014-10-27
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Publication No.: US09558964B2Publication Date: 2017-01-31
- Inventor: Charles G. Woychik , Cyprian Emeka Uzoh , Michael Newman , Terrence Caskey
- Applicant: Invensas Corporation
- Applicant Address: US CA San Jose
- Assignee: Invensas Corporation
- Current Assignee: Invensas Corporation
- Current Assignee Address: US CA San Jose
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/48 ; H01L21/48 ; H05K1/02 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L21/683 ; H01L23/00
Abstract:
A microelectronic assembly including a dielectric region, a plurality of electrically conductive elements, an encapsulant, and a microelectronic element are provided. The encapsulant may have a coefficient of thermal expansion (CTE) no greater than twice a CTE associated with at least one of the dielectric region or the microelectronic element.
Public/Granted literature
- US20150044820A1 METHOD OF FABRICATING LOW CTE INTERPOSER WITHOUT TSV STRUCTURE Public/Granted day:2015-02-12
Information query
IPC分类:
