Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14282593Application Date: 2014-05-20
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Publication No.: US09564517B2Publication Date: 2017-02-07
- Inventor: Kunio Hosoya , Saishi Fujikawa , Yoko Chiba
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2007-275781 20071023
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/66

Abstract:
To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.
Public/Granted literature
- US20140256095A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2014-09-11
Information query
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