Invention Grant
US09570581B2 Method of forming a self-aligned stack gate structure for use in a non-volatile memory array
有权
形成用于非易失性存储器阵列的自对准堆叠栅极结构的方法
- Patent Title: Method of forming a self-aligned stack gate structure for use in a non-volatile memory array
- Patent Title (中): 形成用于非易失性存储器阵列的自对准堆叠栅极结构的方法
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Application No.: US15091202Application Date: 2016-04-05
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Publication No.: US09570581B2Publication Date: 2017-02-14
- Inventor: Willem-Jan Toren , Xian Liu , Gerhard Metzger-Brueckl , Nhan Do , Stephan Wege , Nadia Miridi , Chieng-Sheng Su , Cecile Bernardi , Liz Cuevas , Florence Guyot , Yueh-Hsin Chen , Henry Om'mani , Mandana Tadayoni
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/66 ; H01L21/28 ; H01L27/115 ; H01L21/762
Abstract:
A stack gate structure for a non-volatile memory array has a semiconductor substrate having a plurality of substantially parallel spaced apart active regions, with each active region having an axis in a first direction. A first insulating material is between each stack gate structure in the second direction perpendicular to the first direction. Each stack gate structure has a second insulating material over the active region, a charge holding gate over the second insulating material, a third insulating material over the charge holding gate, and a first portion of a control gate over the third insulating material. A second portion of the control gate is over the first portion of the control gate and over the first insulating material adjacent thereto and extending in the second direction. A fourth insulating material is over the second portion of the control gate.
Public/Granted literature
- US20160225878A1 Method of Forming A Self-Aligned Stack Gate Structure For Use In A Non-volatile Memory Array Public/Granted day:2016-08-04
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