Invention Grant
US09576909B2 Bumpless die-package interface for bumpless build-up layer (BBUL)
有权
无凸起积层的无铅封装接口(BBUL)
- Patent Title: Bumpless die-package interface for bumpless build-up layer (BBUL)
- Patent Title (中): 无凸起积层的无铅封装接口(BBUL)
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Application No.: US14367711Application Date: 2013-08-21
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Publication No.: US09576909B2Publication Date: 2017-02-21
- Inventor: Weng Hong Teh , John S. Guzek , Robert L. Sankman
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- International Application: PCT/US2013/056058 WO 20130821
- International Announcement: WO2015/026344 WO 20150226
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/40 ; H01L23/538 ; H01L23/00 ; H01L21/56 ; H01L23/498 ; H01L25/10

Abstract:
Embodiments of the present disclosure are directed towards bumpless interfaces to an embedded silicon die, in integrated circuit (IC) package assemblies. In one embodiment, a method includes forming a surrounding portion of dielectric material defining a cavity therein; placing at least one die in the cavity, the die including a contact; depositing a dielectric material on the die and the surrounding portion; etching the dielectric material to expose the contact; and depositing conductive material onto the contact. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20160233166A1 BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) Public/Granted day:2016-08-11
Information query
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