Invention Grant
- Patent Title: Method of preventing inversion of output current flow in a voltage regulator and related voltage regulator
- Patent Title (中): 防止电压调节器和相关电压调节器中输出电流反转的方法
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Application No.: US14320999Application Date: 2014-07-01
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Publication No.: US09582017B2Publication Date: 2017-02-28
- Inventor: Sandor Petenyi
- Applicant: STMicroelectronics Design and Application s.r.o.
- Applicant Address: CZ Prague
- Assignee: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
- Current Assignee: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
- Current Assignee Address: CZ Prague
- Agency: Seed IP Law Group LLP
- Priority: ITMI2013A1107 20130702
- Main IPC: G05F1/625
- IPC: G05F1/625 ; G05F1/569 ; H02H7/12 ; H02J7/00

Abstract:
The reversal of the flow of output current in a voltage regulator is prevented by equipping the voltage regulator of a regulation transistor controlled by an analog voltage control, having its current terminals connected between the control terminal of the fifth transistor power of the regulator and the power supply line or the common ground node of the regulator. The regulation transistor is configured to provide an electrical path of conduction between the control terminal and the power supply line or the ground node and is controlled by an analog voltage control that varies in a continuous manner between a first level, suitable to extinguish the regulation transistor, and a second level suitable for biasing it in an operating condition of deep conduction, as the difference between the supply voltage and the regulated output voltage approaching an offset voltage.
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