Invention Grant
- Patent Title: Semiconductor constructions having through-substrate interconnects
- Patent Title (中): 具有贯穿衬底互连的半导体结构
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Application No.: US14505925Application Date: 2014-10-03
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Publication No.: US09583419B2Publication Date: 2017-02-28
- Inventor: Alan G. Wood , Philip J. Ireland
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/00

Abstract:
Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor substrate, and part of an interconnect may be formed within the opening. Another opening may be formed to extend from a second side of the substrate to the first part of the interconnect, and another part of the interconnect may be formed within such opening. Some embodiments include semiconductor constructions having a first part of a through-substrate interconnect extending partially through a semiconductor substrate from a first side of the substrate; and having a second part of the through-substrate interconnect extending from a second side of the substrate and having multiple separate electrically conductive fingers that all extend to the first part of the interconnect.
Public/Granted literature
- US20150130029A1 Semiconductor Constructions Having Through-Substrate Interconnects Public/Granted day:2015-05-14
Information query
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