发明授权
US09583494B2 Apparatus and method for integrated circuit bit line sharing 有权
集成电路位线共享装置及方法

Apparatus and method for integrated circuit bit line sharing
摘要:
A memory array includes a first memory column having a first bit line, a first word line and a second bit line. The memory array also includes a second memory column having the second bit line, a second word line and a third bit line. The first memory column and the second memory column are configured to share the second bit line. The sharing of the second bit line facilitates sharing one or more memory array components between the first memory column and the second memory column.
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