Invention Grant
- Patent Title: Methodology and structure for field plate design
- Patent Title (中): 现场板设计方法与结构
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Application No.: US14604885Application Date: 2015-01-26
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Publication No.: US09590053B2Publication Date: 2017-03-07
- Inventor: Hsueh-Liang Chou , Dah-Chuen Ho , Hui-Ting Lu , Po-Chih Su , Pei-Lun Wang , Yu-Chang Jong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: JP Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: JP Hsin-Chu
- Agency: Eschweiler & Associates, LLC
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L29/78 ; H01L29/417 ; H01L29/66 ; H01L21/761 ; H01L29/10

Abstract:
The present disclosure relates to a high voltage transistor device having a field plate, and a method of formation. In some embodiments, the high voltage transistor device has a gate electrode disposed over a substrate between a source region and a drain region located within the substrate. A dielectric layer laterally extends from over the gate electrode to a drift region arranged between the gate electrode and the drain region. A field plate is located within a first inter-level dielectric layer overlying the substrate. The field plate laterally extends from over the gate electrode to over the drift region and vertically extends from the dielectric layer to a top surface of the first ILD layer. A plurality of metal contacts, having a same material as the field plate, vertically extend from a bottom surface of the first ILD layer to a top surface of the first ILD layer.
Public/Granted literature
- US20160149007A1 METHODOLOGY AND STRUCTURE FOR FIELD PLATE DESIGN Public/Granted day:2016-05-26
Information query
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