Invention Grant
US09590101B2 FinFET with multiple dislocation planes and method for forming the same
有权
具有多个位错平面的FinFET及其形成方法
- Patent Title: FinFET with multiple dislocation planes and method for forming the same
- Patent Title (中): 具有多个位错平面的FinFET及其形成方法
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Application No.: US15161723Application Date: 2016-05-23
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Publication No.: US09590101B2Publication Date: 2017-03-07
- Inventor: Chih-Hsiang Huang , Da-Wen Lin
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/78 ; H01L27/088 ; H01L29/06 ; H01L21/8234 ; H01L21/324 ; H01L21/265 ; H01L21/762 ; H01L29/66 ; H01L21/84 ; H01L27/12
Abstract:
A method comprises forming a first fin and a second fin over a substrate, wherein the first fin and the second fin are separated by a trench, applying a first pre-amorphous implantation (PAI) process to the substrate and forming a first PAI region underlying the trench as a result of the first PAI process, depositing a first tensile film layer on sidewalls and a bottom of the trench, converting the first PAI region into a first dislocation plane underlying the trench using a first anneal process and forming an isolation region over the first dislocation plane.
Public/Granted literature
- US20160268429A1 FinFET with Multiple Dislocation Planes and Method for Forming the Same Public/Granted day:2016-09-15
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