发明授权
- 专利标题: High-speed low-power LDPC decoder design
- 专利标题(中): 高速低功耗LDPC解码器设计
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申请号: US14444712申请日: 2014-07-28
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公开(公告)号: US09590658B1公开(公告)日: 2017-03-07
- 发明人: LingQi Zeng , Abhiram Prabhakar , Jason Bellorado , Johnson Yen
- 申请人: SK Hynix Inc.
- 申请人地址: KR Gyeonggi-do
- 专利权人: SK Hynix Inc.
- 当前专利权人: SK Hynix Inc.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: IP & T Group LLP
- 主分类号: H03M13/00
- IPC分类号: H03M13/00 ; H03M13/11
摘要:
Decoding an LDPC encoded codeword is disclosed. Variable nodes corresponding to a parity check matrix of the LDPC encoded codeword have been divided into a plurality of groups. A selected group of variable nodes from the plurality of groups of variable nodes is updated. Check nodes are updated using a min-sum update. A selected input value provided from a variable node of the selected group of variable nodes and provided to a certain check node of the check nodes is discarded to be not available for use in a future min-sum update.