Invention Grant
- Patent Title: Distribution of power vias in a multi-layer circuit board
- Patent Title (中): 在多层电路板中分配电源通孔
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Application No.: US14717026Application Date: 2015-05-20
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Publication No.: US09594865B2Publication Date: 2017-03-14
- Inventor: Zhaoqing Chen , Matteo Cocchini , Rohan U. Mandrekar , Tingdong Zhou
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Margaret A. McNamara
- Main IPC: G06F17/50
- IPC: G06F17/50 ; H05K3/00

Abstract:
One aspect is a method that includes identifying, by a power via placement tool executing on a processor of a circuit design system, a source and a sink of a voltage domain of a multi-layer circuit board based on a design file defining a layout of the multi-layer circuit board. A number of power vias to support a maximum current demand from the source to the sink is determined. Positions of a plurality of the power vias are determined at locations of the multi-layer circuit board forming paths through the power vias between the source and the sink and having a substantially equal total path length through each total path defined between the source and the sink through at least one of the power vias. The design file is modified to include the power vias at the positions.
Public/Granted literature
- US20160342723A1 DISTRIBUTION OF POWER VIAS IN A MULTI-LAYER CIRCUIT BOARD Public/Granted day:2016-11-24
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