Invention Grant
- Patent Title: Structure and formation method for chip package
- Patent Title (中): 芯片封装的结构和形成方法
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Application No.: US14881840Application Date: 2015-10-13
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Publication No.: US09595510B1Publication Date: 2017-03-14
- Inventor: Jui-Pin Hung , Cheng-Lin Huang , Hsien-Wen Liu , Shin-Puu Jeng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/10 ; H01L25/00 ; H01L21/56 ; H01L23/10

Abstract:
Structures and formation methods of a chip package are provided. The chip package includes a semiconductor die and a package layer partially or completely encapsulating the semiconductor die. The chip package also includes a conductive feature penetrating through the package layer. The chip package further includes an interfacial layer the interfacial layer continuously surrounds the conductive feature. The interfacial layer is between the conductive feature and the package layer, and the interfacial layer is made of a metal oxide material.
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