- 专利标题: Method and materials for warpage thermal and interconnect solutions
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申请号: US14229788申请日: 2014-03-28
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公开(公告)号: US09607964B2公开(公告)日: 2017-03-28
- 发明人: Omkar G. Karhade , Nitin A. Deshpande, Jr. , Aditya Sundoctor Vaidya , Nachiket R. Raravikar , Eric J. Li
- 申请人: Omkar G. Karhade , Nitin A. Deshpande, Jr. , Aditya Sundoctor Vaidya , Nachiket R. Raravikar , Eric J. Li
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L23/498 ; H01L25/10 ; H01L25/00 ; H01L23/31 ; H01L21/56
摘要:
Embodiments describe a semiconductor package that includes a substrate, a die bonded to the substrate, and a solder paste overmold layer formed over a top surface of the die. In an embodiment, the solder paste comprises a high-melting point metal, a solder matrix, intermetallic compounds and a polymer. The overmold layer has a high elastic modulus, a coefficient of thermal expansion similar to the substrate, and reduces the warpage of the package. In an embodiment, interconnects of a semiconductor package are formed with a no-slump solder paste that includes vents. Vents may be formed through a conductive network formed by the high-melting point metal, solder matrix and intermetallic compounds. In an embodiment, vents provide a path through the interconnect that allows for moisture outgassing. In an embodiment, a mold layer may be mechanically anchored to the interconnects by the vents, thereby providing improved mechanical continuity to the mold layer.