Invention Grant
- Patent Title: Apparatuses and methods for pre-fetching and write-back for a segmented cache memory
-
Application No.: US13692907Application Date: 2012-12-03
-
Publication No.: US09612972B2Publication Date: 2017-04-04
- Inventor: David Roberts , J. Thomas Pawlowski
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0895

Abstract:
Apparatuses and methods for a cache memory are described. In an example method, a transaction history associated with a cache block is referenced, and requested information is read from memory. Additional information is read from memory based on the transaction history, wherein the requested information and the additional information are read together from memory. The requested information is cached in a segment of a cache line of the cache block and the additional information in cached another segment of the cache line. In another example, the transaction history is also updated to reflect the caching of the requested information and the additional information. In another example, read masks associated with the cache tag are referenced for the transaction history, the read masks identifying segments of a cache line previously accessed.
Public/Granted literature
- US20140156948A1 APPARATUSES AND METHODS FOR PRE-FETCHING AND WRITE-BACK FOR A SEGMENTED CACHE MEMORY Public/Granted day:2014-06-05
Information query