Multi-mode discrete-time delta-sigma modulator power optimization using split-integrator scheme
Abstract:
A method and an apparatus for splitting a switched capacitor integrator of a delta-sigma modulator are provided. The apparatus configures a first integrator and a second integrator to be coupled in parallel to each other, switches between a first mode and a second mode, enables the first integrator to operate on an input signal to generate an output signal in the first mode, and enables the first integrator and the second integrator to cooperatively operate on the input signal in the second mode, wherein in the second mode, the apparatus generates a first output via the first integrator, generates a second output via the second integrator, and converges the first output with the second output to generate the output signal.
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