Invention Grant
- Patent Title: Low power buffer with gain boost
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Application No.: US15231449Application Date: 2016-08-08
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Publication No.: US09647643B2Publication Date: 2017-05-09
- Inventor: James Lawrence Gorecki , Han-Yuan Tan
- Applicant: INPHI CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INPHI CORPORATION
- Current Assignee: INPHI CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Ogawa P.C.
- Agent Richard T. Ogawa
- Main IPC: H03K3/012
- IPC: H03K3/012 ; H03K5/02 ; G11C27/02 ; H03F1/32 ; H03F3/45 ; H03M1/12 ; H03M3/00

Abstract:
The present disclosure provides a detailed description of techniques for implementing a low power buffer with gain boost. More specifically, some embodiments of the present disclosure are directed to a buffer with a stacked transistor configuration, wherein the first transistor receives an input signal and the second transistor receives a complement of the input signal. The first transistor is configured to generate a non-inverting response to the input signal, and the second transistor is configured to generate an inverting response to the complement of the input signal, and to generate a negative gds effect, enabling the buffer to exhibit low power and unity gain across a wide bandwidth. In other embodiments, the stacked transistor configuration can be deployed in a full differential implementation. In other embodiments, the buffer can include techniques for improving linearity, DC level shifts, capacitive input loading, and output slewing, settling, and drive capabilities.
Public/Granted literature
- US20160352372A1 LOW POWER BUFFER WITH GAIN BOOST Public/Granted day:2016-12-01
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