Invention Grant
- Patent Title: Method for fabricating fan-out wafer level package and fan-out wafer level package fabricated thereby
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Application No.: US14824394Application Date: 2015-08-12
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Publication No.: US09653372B2Publication Date: 2017-05-16
- Inventor: Yonghwan Kwon
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/31 ; H01L21/48 ; H01L21/56 ; H01L23/00 ; H01L23/538 ; H01L25/065

Abstract:
A method for fabricating a fan-out wafer level package includes disposing a first semiconductor chip on a dummy substrate, forming a mold substrate on the first semiconductor chip and the dummy substrate, removing the dummy substrate to expose the first semiconductor chip, disposing a second semiconductor chip on the exposed first semiconductor chip, forming an insulating layer on the second semiconductor chip, the first semiconductor chip, and the mold substrate, and forming a plurality of redistribution lines that electrically connects the first semiconductor chip and the second semiconductor chip through the insulating layer.
Public/Granted literature
- US20160118326A1 METHOD FOR FABRICATING FAN-OUT WAFER LEVEL PACKAGE AND FAN-OUT WAFER LEVEL PACKAGE FABRICATED THEREBY Public/Granted day:2016-04-28
Information query
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