- Patent Title: Chip arrangement and a method of manufacturing a chip arrangement
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Application No.: US13771222Application Date: 2013-02-20
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Publication No.: US09653405B2Publication Date: 2017-05-16
- Inventor: Horst Theuss , Beng Keh See
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Agency: Viering, Jentschura & Partner mbB
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/56 ; H01L23/00

Abstract:
In various embodiments, a chip arrangement may be provided. The chip arrangement may include a metallic carrier. The chip arrangement may also include at least one chip arranged on the metallic carrier, wherein the at least one chip includes a chip contact, wherein the chip contact is electrically coupled to the metallic carrier. The chip arrangement may also include encapsulation material at least partially encapsulating the at least one chip. The chip arrangement may also include an electrically conductive shielding structure formed over at least a portion of the encapsulation material to electrically contact the metallic carrier.
Public/Granted literature
- US20140231971A1 CHIP ARRANGEMENT AND A METHOD OF MANUFACTURING A CHIP ARRANGEMENT Public/Granted day:2014-08-21
Information query
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