Invention Grant
- Patent Title: Selective rasterization
-
Application No.: US14047079Application Date: 2013-10-07
-
Publication No.: US09659393B2Publication Date: 2017-05-23
- Inventor: Tomas G. Akenine-Moller , Carl J. Munkberg , Franz P. Clarberg
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop Pruner & Hu, P.C.
- Main IPC: G06T3/00
- IPC: G06T3/00 ; G06T11/40

Abstract:
According to one embodiment, a given tile, made up of pixels or samples, may be of any shape, including a square shape. These pixels may contain colors, depths, stencil values, and other values. Each tile may be further augmented with a single bit, referred to herein as a render bit. In one embodiment, if the render bit is one, then everything is rendered as usual within the tile. However, if the render bit is zero, then nothing is rasterized to this tile and, correspondingly, depth tests, pixel shading, frame buffer accesses, and multi-sampled anti-aliasing (MSAA) resolves are not done for this tile. In other embodiments, some operations may be done nevertheless, but at least one operation is avoided based on the render bit. Of course, the render bits may be switched such that the bit zero indicates that everything should be rendered and the bit one indicates more limited rendering.
Public/Granted literature
- US20150097857A1 Selective Rasterization Public/Granted day:2015-04-09
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T3/00 | 在图像平面内的图形图像转换 |