Invention Grant
- Patent Title: Method, apparatus, and system for e-fuse in advanced CMOS technologies
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Application No.: US14936582Application Date: 2015-11-09
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Publication No.: US09659862B1Publication Date: 2017-05-23
- Inventor: Suraj Kumar Patil , Min-Hwa Chi
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: H01L29/02
- IPC: H01L29/02 ; H01L47/00 ; H01L23/525

Abstract:
Methods, apparatus, and systems for fabricating and using a semiconductor device comprising a first conductive element; a second conductive element; and an e-fuse comprising a first region comprising a conductive oxide of a first metal; and a second region comprising a second metal, wherein an oxide of the second metal is resistive; wherein the e-fuse is electrically connected to both the first conductive element and the second conductive element.
Public/Granted literature
- US20170133319A1 METHOD, APPARATUS, AND SYSTEM FOR E-FUSE IN ADVANCED CMOS TECHNOLOGIES Public/Granted day:2017-05-11
Information query
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