- 专利标题: Increased cache performance with multi-level queues of complete tracks
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申请号: US14505702申请日: 2014-10-03
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公开(公告)号: US09665493B2公开(公告)日: 2017-05-30
- 发明人: Kevin J. Ash , Lokesh M. Gupta , David B. Whitworth , Boyan Zhao
- 申请人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 代理机构: Griffiths & Seaton PLLC
- 主分类号: G06F12/00
- IPC分类号: G06F12/00 ; G06F12/0875 ; G06F9/52 ; G06F3/06
摘要:
Exemplary method, system, and computer program product embodiments for increased cache performance using multi-level queues by a processor device. The method includes distributing to each one of a plurality of central processing units (CPUs) workload operations for creating complete tracks from partial tracks, creating sub-queues of the complete tracks for distributing to each one of the CPUs, and creating demote scan tasks based on workload of the CPUs. Additional system and computer program product embodiments are disclosed and provide related advantages.
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