Invention Grant
- Patent Title: Semiconductor packages having interconnection members
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Application No.: US14878891Application Date: 2015-10-08
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Publication No.: US09668344B2Publication Date: 2017-05-30
- Inventor: Won Duck Jung , Jong Ho Lee , Joo Hyun Kang , Chong Ho Cho , In Chul Hwang
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-Si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-Si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2015-0057564 20150423; KR10-2015-0065618 20150511
- Main IPC: H05K7/00
- IPC: H05K7/00 ; H05K7/12 ; H05K1/11 ; H01L27/115 ; H05K1/14 ; H05K3/32

Abstract:
A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.
Public/Granted literature
- US20160316559A1 SEMICONDUCTOR PACKAGES HAVING INTERCONNECTION MEMBERS Public/Granted day:2016-10-27
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