Invention Grant
- Patent Title: Memory devices, testing systems and methods
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Application No.: US14518734Application Date: 2014-10-20
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Publication No.: US09672939B2Publication Date: 2017-06-06
- Inventor: Michael A. Shore
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/44 ; G11C29/38 ; G11C29/36

Abstract:
Testing systems and methods, as well as memory devices using such testing systems and methods, may facilitate testing of memory devices using a read-modify-write test procedure. One such testing system receives a signal indicative of at least some of a plurality of bits of data read from an address differing from each other, and then masks subsequent write operations at the same address. Therefore, any address at which the bits of read data do not all have the same value may be considered to be faulty. Failure data from the test can therefore be stored in the same array of memory cells that is being tested.
Public/Granted literature
- US20150082106A1 MEMORY DEVICES, TESTING SYSTEMS AND METHODS Public/Granted day:2015-03-19
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