Invention Grant
- Patent Title: Array of gated devices and methods of forming an array of gated devices
-
Application No.: US14461751Application Date: 2014-08-18
-
Publication No.: US09673054B2Publication Date: 2017-06-06
- Inventor: Marcello Mariani , Anna Maria Conti , Sara Vigano
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L21/8249
- IPC: H01L21/8249 ; H01L21/308 ; H01L29/78 ; H01L29/744 ; H01L27/102

Abstract:
An array of gated devices includes a plurality of gated devices arranged in rows and columns and individually including an elevationally inner region, a mid region elevationally outward of the inner region, and an elevationally outer region elevationally outward of the mid region. A plurality of access lines are individually laterally proximate the mid regions along individual of the rows. A plurality of data/sense lines are individually elevationally outward of the access lines and electrically coupled to the outer regions along individual of the columns. A plurality of metal lines individually extends along and between immediately adjacent of the rows elevationally inward of the access lines. The individual metal lines are directly against and electrically coupled to sidewalls of the inner regions of each of immediately adjacent of the rows. The metal lines are electrically isolated from the data/sense lines. Other arrays of gated devices and methods of forming arrays of gated devices are disclosed.
Public/Granted literature
- US20160049404A1 Array Of Gated Devices And Methods Of Forming An Array Of Gated Devices Public/Granted day:2016-02-18
Information query
IPC分类: