Invention Grant
- Patent Title: Semiconductor substrate having stress-absorbing surface layer
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Application No.: US14333553Application Date: 2014-07-17
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Publication No.: US09673065B2Publication Date: 2017-06-06
- Inventor: Jaimal M. Williamson , Nima Shahidi , Jose Carlos Arroyo
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Rose Alyssa Keagy; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L21/56
- IPC: H01L21/56 ; H01L23/29 ; H01L23/31 ; H01L23/498 ; H01L23/00

Abstract:
An assembly (101) comprising a semiconductor device (110) with solderable bumps (112); a substrate (120) with a layer (130) of a first insulating compound and an underlying metal layer (140) patterned in contact pads (141) and connecting traces (142), the insulating layer having openings (132) to expose the surface (142a) and sidewalls (142b) of underlying traces; the device bumps soldered onto the contact pads, establishing a gap (150) between device and top insulating layer; and a second insulating compound (160) cohesively filling the gap and the second openings, thereby touching the underlying traces, the second insulating compound having a higher glass transition temperature, a higher modulus, and a lower coefficient of thermal expansion than the first insulating compound.
Public/Granted literature
- US20150021762A1 SEMICONDUCTOR SUBSTRATE HAVING STRESS-ABSORBING SURFACE LAYER Public/Granted day:2015-01-22
Information query
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