- Patent Title: Array substrate having via-hole conductive layer and display device
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Application No.: US15233255Application Date: 2016-08-10
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Publication No.: US09673231B2Publication Date: 2017-06-06
- Inventor: Shi Shu , Feng Zhang , Yaohui Gu , Fang He , Feng Gu
- Applicant: BOE TECHNOLOGY GROUP CO., LTD.
- Applicant Address: CN Beijing
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Beijing
- Agency: Ladas & Parry LLP
- Priority: CN201410697709 20141126
- Main IPC: H01L29/80
- IPC: H01L29/80 ; H01L27/12 ; G02F1/1343 ; G02F1/1362 ; G02F1/1368 ; G02F1/1333 ; G02F1/1335 ; G02F1/1339 ; H01L21/768 ; H01L29/45

Abstract:
Embodiments of the disclosure provide an array substrate having via-hole conductive layer and display device. The array substrate includes: a thin film transistor; a passivation layer, covering the thin film transistor, the passivation layer having a via hole and the via hole exposing at least a portion of a drain electrode of the thin film transistor; a via-hole conductive layer, covering the portion of the drain electrode exposed at the via hole and connected to the drain electrode, and a reflectivity of the via-hole conductive layer being lower than a reflectivity of the drain electrode; and a pixel electrode, connected with the drain electrode through the via-hole conductive layer.
Public/Granted literature
- US20160351588A1 ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, AND DISPLAY DEVICE Public/Granted day:2016-12-01
Information query
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