Invention Grant
- Patent Title: Power multiplexing with flip-flops
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Application No.: US14861503Application Date: 2015-09-22
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Publication No.: US09673787B2Publication Date: 2017-06-06
- Inventor: Lipeng Cao , Jeffrey Gemar , Ramaprasath Vilangudipitchai
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Arent Fox, LLP
- Main IPC: H03K3/012
- IPC: H03K3/012 ; H03K3/3562 ; H03K3/037 ; H03K3/356

Abstract:
Data retention circuitry, such as at least one integrated circuit (IC), is disclosed herein for power multiplexing with flip-flops having a retention feature. In an example aspect, an IC includes a first power rail and a second power rail. The IC further includes a flip-flop and power multiplexing circuitry. The flip flop includes a master portion and a slave portion. The master portion is coupled to the first power rail for a regular operational mode and for a retention operational mode. The power multiplexing circuitry is configured to couple the slave portion to the first power rail for the regular operational mode and to the second power rail for the retention operational mode.
Public/Granted literature
- US20170085253A1 POWER MULTIPLEXING WITH FLIP-FLOPS Public/Granted day:2017-03-23
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