An electronic device includes volatile memory, flash memory, and a CPU. The volatile memory includes a first actual data region that records actual data and a first log region that records update information including update data used for updating the actual data. The flash memory includes blocks and undergoes block unit initialization when writing is to be performed thereto. The blocks each include a second actual data region that records actual data and a second log region that records update information written from the first log region. The CPU writes update information corresponding to update data to the first log region when updating actual data using the update data. At a preset specific timing, the CPU collects update information recorded in the first log region, writes the collected update information to the second log regions in accordance with a specific order, and subsequently initializes the first log region.