Invention Grant
- Patent Title: Method of manufacturing MOSFET
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Application No.: US14436892Application Date: 2012-10-30
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Publication No.: US09691878B2Publication Date: 2017-06-27
- Inventor: Haizhou Yin , Huilong Zhu , Changliang Qin , Huaxiang Yin
- Applicant: Haizhou Yin , Huilong Zhu , Changliang Qin , Huaxiang Yin
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Science
- Current Assignee: Institute of Microelectronics, Chinese Academy of Science
- Current Assignee Address: CN Beijing
- Agency: Treasure IP Group, LLC
- Priority: CN201210407448 20121023
- International Application: PCT/CN2012/083750 WO 20121030
- International Announcement: WO2014/063381 WO 20140501
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; H01L29/78 ; H01L29/165 ; H01L21/762 ; H01L21/02 ; H01L21/265 ; H01L21/306 ; H01L21/308 ; H01L29/161

Abstract:
Provided is a method for manufacturing a MOSFET, including: forming a shallow trench isolation (STI) in a semiconductor substrate to define an active region for the MOSFET; performing etching with the STI as a mask, to expose a surface of the semiconductor substrate, and to protrude a portion of the STI with respect to the surface of the semiconductor substrate, resulting in a protruding portion; forming a first spacer on sidewalls of the protruding portion; forming a gate stack on the semiconductor substrate; forming a second spacer surrounding the gate stack; forming openings in the semiconductor substrate with the STI, the gate stack, the first spacer and the second spacer as a mask; epitaxially growing a semiconductor layer with a bottom surface and sidewalls of each of the openings as a growth seed layer; and performing ion implantation into the semiconductor layer to form source and drain regions.
Public/Granted literature
- US20150295068A1 METHOD OF MANUFACTURING MOSFET Public/Granted day:2015-10-15
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