Invention Grant
- Patent Title: Using materials with different etch rates to fill trenches in semiconductor devices
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Application No.: US14137497Application Date: 2013-12-20
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Publication No.: US09704798B2Publication Date: 2017-07-11
- Inventor: Sridhar Govindaraju , Anindya Dasgupta , Rohit Grover
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L23/485

Abstract:
An embodiment includes a metal interconnect structure, comprising: a dielectric layer on a substrate; an opening in the dielectric layer, wherein the opening has opening sidewalls and exposes a conductive region of at least one of the substrate and an additional interconnect structure; a first atomic layer deposition (ALD) layer on the conductive region and the opening sidewalls; a second ALD layer on a portion of the first ALD layer, and a third ALD layer within the opening and on the first ALD layer. Other embodiments are described herein.
Public/Granted literature
- US20150179567A1 USING MATERIALS WITH DIFFERENT ETCH RATES TO FILL TRENCHES IN SEMICONDUCTOR DEVICES Public/Granted day:2015-06-25
Information query
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